| Technical
Papers |
|
|
| 28. |
Efficient Signal and Power
Integrity Analysis Using Parallel Techniques
[EPEP] Electrical Performance of Electronic Packaging, 2007.
Presentation describing parallel computing technology to
use multi-processors in a singly system or across a network to
increase simulation throughput.
Paper (PDF Format)
Presentation (PPT Format)
|
| 27. |
Cost-Optimized PCB Power Integrity Design
[PCD&M] Printed Circuit Design & Manufacture Magazine, March 2007.
New analysis tools measure the performance of the power
delivery system and consider both cost and electrical
performance resulting in a functional and cost-efficient
design.
Paper (HTML Format)
|
|
26. |
A Review of PCB-level Power Delivery System
EE Times, Asia, China and Korea, May/June 2006
Improve power delivery system performance by understanding
the fundamental issues in design, and doing extensive
modeling and simulation of the entire PDS.
Paper (HTML Format, English)
Paper (HTML Format, Chinese)
|
| 25. |
Fundamentals of S-Parameter Modeling for Power Distribution System (PDS) and SSO Analysis
[IBIS Summit] Anaheim, CA, June 2005.
Presentation (PDF Format)
|
| 24. |
IR Drop in High-Speed IC Packages and PCBs
[PCD&M] Printed Circuit Design & Manufacture Magazine, April 2005.
Neckdowns, low-weight copper and Swiss cheese effects are
conspiring to wreak havoc on your high-speed design. Get the
drop on them.
Paper (PDF Format)
|
| 23. |
On-Chip Power Integrity, Including Package Effects
[SoC] SoCcentral Online Articles, March 14, 2005
On-chip power integrity effects and their influence on the entire power delivery system
have become a major concern in the design of large and complex high-speed SoC designs. Today's extreme design challenges
require a complete power-aware solution that encompasses the global
effects of the entire power delivery system, including the realistic effects of the package
and the PC board on the functional operation of the IC.
Written by Dr. Fang and John Kane.
Paper (HTML Format)
|
| 22. |
An Initial Case Study for BIRD95: Enhancing IBIS for SSO Power Integration Simulation
DesignCon, 2005.
This presentation is an overview on how BIRD95 can potentially help improve IBIS models.
Presentation (PDF Format)
|
| 21. |
A Fast Evaluation of Power Delivery System Input Impedance of Printed Circuit Boards with Decoupling Capacitors
[EPEP] Electrical Performance of Electronic Packaging, 2004.
A fast power delivery system input impedance evaluation methodology for printed circuit board decoupling capacitor placement study is presented in this paper.
Paper (PDF Format)
Presentation (PPT Format)
|
| 20. |
Recent Developments in Polyimide-Based Planar Capacitor Laminates
[ICEP] International Conference on Embedded Passives, June 2004.
This paper discusses performance and reliability data of both unfilled and ceramic-filled polyimide-based thin core laminates for use as embedded planar capacitor layers. A short overview of a simulation tool’s prediction of the impact of increasing the dielectric constant between power and ground will also be discussed.
Paper (PDF Format)
|
| 19. |
Using Signal Integrity Analysis to Achieve EMC
[PCD&M] Printed Circuit Design & Manufacturing Magazine, April 2004.
This paper discusses how some EMC engineers use signal integrity to help improve EMI performance
and shorten testing times.
Paper (PDF Format)
|
| 18. |
The Power of Planes - Low Impedance Power Delivery Over Broad Frequencies
[PCD&M] Dr. Jiayuan Fang and Dr. Jin Zhao, Printed Circuit Design &
Manufacturing Magazine, Sept. 2003.
This paper discusses low-impedance power delivery over broad frequencies, specifically
how decoupling capacitors reduce impedances at low frequencies while removing resonances up to
a few hundred MHz.
Paper (PDF Format)
|
| 17. |
Measured and Simulated Signal Propagation Behavior on High Speed Nets of Large, High Dense, and Complex PCBs
[spi2003_Miersch]
The purpose of this paper is to evaluate, quantitatively, the influence of the individual
parasitic parameter groups like on-board nets, chip packages, on-chip parameters on the total
net performance of the simulation.
Paper (PDF Format)
Presentation (PDF Format)
|
| 16. |
Effective Decoupling Radius of Decoupling Capacitor
[epep2001_Chen]
Decoupling capacitors on packages and printed circuits
boards are often essential to reduce
voltage fluctuations and maintain
power and signal integrity. This paper presents a method
for the evaluation of effectiveness of
decoupling capacitors placed on package or board structures.
Paper (PDF Format)
Presentation (HTML Format)
|
| 15. |
Signal Integrity
[EMC-IEEE]
Book Chapter, Engineering Electromagnetic Compatibility, Second Edition,
IEEE Press and John Wiley & Sons, Inc., 2001
In this chapter, we will discuss what the typical signal integrity problems are, where they come from, why it is important to understand them and how we can analyze and solve these issues. Several software tools available at present for signal integrity analysis and current trends in this area will also be introduced.
Paper (PDF Format)
|
| 14. |
Effects of 20-H Rule and
Shielding Vias on Electromagnetic Radiation From Printed
Circuit Boards
[epep_2000]
This
paper investigates the effects of the 20-H rule and
shielding vias on the radiation from printed circuit boards.
For the two-plane structure, 20-H rule yields much more
radiation than the normal structure. For the multiple plane
case, no significant change in radiation is found if the
20-H rule is applied to the internal planes. Also, the
numerical result shows that the usage of shielding vias
would cut down the radiation effectively.
Paper
(PDF Format)
Presentation (HTML Format)
|
| 13. |
Modeling
of the Electrical Performance of the Power and Ground Supply
for a PC Microprocessor on a Card
[epep98_amd]
October 26, 1998
Paper
(PDF Format)
|
| 12. |
Effects
of Power/Ground Via Distribution on the Power/Ground
Performance of C4/BGA Packages
[epep98_zhao]
October 26, 1998
Paper
(PDF Format)
|
| 11. |
Extraction
of Equivalent Circuit Models of Package Power Supply
Distribution Systems from Full Wave EM Field Simulations
[epep98_moll]
October 26, 1998
Paper
(PDF Format)
|
| 10. |
Validity
of Mutual Inductor Model for Electromagnetic Coupling
between Vias in Integrated-Circuit Packages and Printed
Circuit Boards
[ectc98]
May 25, 1998
Paper
(PDF Format)
|
| 9. |
Where to
Place Decoupling Capacitors ? -- Answer to a Problem Posted
on SI-List
[reply]
February 13, 1998
Discussion
(HTML Format)
|
| 8. |
Shorting
Via Arrays for the Elimination of Package Resonance to
Reduce Power Supply Noise in Multi-layered Area-Array IC
Packages
[ipdi98]
February 2, 1998
Paper
(HTML Format) |
| 7. |
Significance
of Electromagnetic Coupling Through Vias in Electronics
Packaging
[epep97]
October 27, 1997
Paper
(HTML Format) |
| 6. |
The
Facts about the Input Impedance of Power and Ground Planes
[inputimp]
July 31, 1997
Paper
(HTML Format) |
| 5. |
Reduction of Power and Ground Noise Coupling in Mixed Signal Modules
[epep96]
October, 1996
Paper
(PDF Format)
Presentation (HTML Format) |
| 4. |
Optimum
Placement of Decoupling Capacitors on Packages and Printed
Circuit Boards Under the Guidance of Electromagnetic Field
Simulation
[ectc96o]
May 28, 1996
Paper
(PDF Format) |
| 3. |
Measurement
and Simulation of Simultaneous Switching Noise in the
Multi-Reference Plane Package
[ectc96m]
May 28, 1996
Paper
(PDF Format) |
| 2. |
Extraction
of Transient Behavioral Model of Digital I/O Buffers from
IBIS
[ectc96ibis]
May 28, 1996
Paper
(PDF Format) |
| 1. |
A New
Approach to Signal Integrity Analysis of High-Speed
Packaging
[epep95]
October 2, 1995
Paper
(PDF Format) |
