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Product Overview
Broadband SPICE
Unified Package Designer
Evaluation Request


XcitePITM performs both frequency and time domain simulations to enable the best possible understanding of dynamic noise that can impact the power integrity of the system.  Analysis of the full-chip power grid can be done incorporating spatially distributed package effects to determine the existence and severity of power integrity degradation including those that only show up when a chip is designed into a system.  XcitePI facilitates effective design improvement with a range electrical performance assessment and visualization options to show the impact of changes in capacitor locations along with changes to bump, pad and the power grid designs.  This helps design teams avoid costly late stage design respins.
PowerSI XcitePI Data Sheet in PDF Format
pre / post layout electrical anaylysis; power and signal integrity

XcitePI Applications:

Performing dynamic noise simulation of the full-chip power grid.
Understanding complex chip-package-board noise propagation.
Simulating voltage noise in the time domain.
Conducting frequency domain impedance analysis.
Analyzing simultaneous switching noise (SSN).
Checking IO power grid and signal electrical performance.
Evaluating packaging alternatives along with bump, ball and power grid options.
Assessing decoupling capacitor implementations both on- and off-chip.
Generating SPICE or multi-port S-parameter models.
Creating a layout-based prototype of the on-chip power delivery network (PDN).
time-domain analysis tool

XcitePI Advantages:

High performance analysis that can be applied to very large designs such as micro-processors.
Flexible incorporation of package board models with user configurable abstraction levels.
Unique solution to identify power integrity issues that arise when the chip is incorporated into a system.
Enables efficient extraction of mutual inductance and coupling capacitance for both power grid structures and IO signal interconnects.
Provides maximum accuracy with a compact chip model that is spatially distributed with high pin resolution.
Supports both time and frequency domain impedance analysis.
Rapid what-if experiments for achieving targeted design performance improvement.
Full featured platform for chip-package-board electrical do-design.
Compliments most commonly used chip, package, SiP (System-in-Package) and board idesign flows.
Evaluate power and signal integrity tools Evaluation
To learn more about XcitePI or to begin an evaluation, please contact us.

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  Modified: October 31, 2012

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