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Product Overview
Broadband SPICE
Unified Package Designer
Evaluation Request


Unified Package DesignerTM (UPD) is a comprehensive IC package design environment for single and multi-die applications.  Flip-chip and wirebond die attachment approaches are accommodated.  System-in-package (SiP) applications including side-by-side, stacked and package-on-package (PoP) implementations are fully supported.  3D visualization and checking simplifies design and improves manufacturability.  Sophisticated electrical constraints are incorporated into UPD and push-button RLC extraction is available as an option.

Unified Package Designer Data Sheet in PDF format


UPD Applications:

Designing the full range of today's advanced package and leadframe designs
Understanding package feasibility early in the design process
Creating design documentation including wirebond diagrams
Streamlining the reuse of previous package designs (including substrate driven wire bonding)
Managing electrical constraints and high-speed routing rules through the package layout process
Maximizing package manufacturing yields by appropriately considering the 3D nature of packaging structures in the design phase
Generating RLC package models (with the XtractIM option to UPD)
Sharing design information with internal and external partners utilizing a compatible viewer
IR drop, EM analysis techniques

UPD Advantages:

Packaging specific product architecture provides fast user ramp-up, high productivity and throughput
One tool for all design styles - SiP, stacked-die, single chip, chip-scale and leadframe
Consistently fastest in supporting new packaging technologies
Integrated high-speed design rules plus optional single-click RLC extraction
Powerful 3D design and DRC all in the same module - no add-ons or multiple rule sets
Unique design-for-manufacture capability proven for high-yield, high-volume results
Delivers the most powerful wirebond capability available (with placement automation and dynamic push/shove editing)
Robust automatic and interactive functions for flip-chip bump fanout and route planning with full support for high-speed rules and area-based constraints
time-domain analysis tool

Free UPD Design Viewer

Complete functional version for viewing Unified Package Design (UPD) including a graphical user interface designed for casual users.
time-domain analysis tool


To learn more about Unified Package Designer or to begin an evaluation, please contact us.

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  Modified: October 31, 2012

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