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Product Overview
Broadband SPICE
Unified Package Designer
Evaluation Request


Speed2000 signal & power integrity software for IC package & PCB

OptimizePI enables design teams to balance decoupling capacitor (decap) cost and performance for printed circuit boards (PCBs) and IC packages. Decap costs savings of 15% to 50% are typical. High performance is analytically assured for the power delivery system (PDS) at both a system and component level. OptimizePI is built on proven Sigrity hybrid electromagnetic circuit analysis technology in combination with our unique optimization engine to quickly pinpoint the best possible decap selections and placement locations.
Speed2000 Data Sheet OptimizePI Data Sheet in PDF format
electrical anaysis, power and ground siginal integrity

OptimizePI Applications:

Automatically selecting and placing decoupling capacitors
Eliminating decap over-design for printed circuit boards and IC packages
Reducing PDS cost for new designs and post-production products
Developing effective decap guidelines for packaged components
Recapturing design area by eliminating unnecessary decaps
Assessing PDS cost vs. performance trade-offs interactively
Optimizing a PDS across the board / package interface
Creating lowest-cost / best performance decap placement tables
dynamic wave propagation

OptimizePI Advantages:

Quantifiable decap cost savings without PDS performance risk
Unique fully automated environment for analyzing cost vs. performance
Utilizes design data from popular PCB and IC package layout systems
Robust and proven underlying hybrid EM / circuit analysis technology
Intuitive and interactive visualization of PDS performance
Simple to set up for pre-layout and post layout decap optimization
Ability to support large designs that include both package and board data

To learn more about OptimizePI or to begin an evaluation, please contact us.


Papers and Articles

  Press Release:  "Sigrity Introduces Industry's First Pre-Layout System-Level Power Delivery Optimization"

  Paper:  "The effects of Chip and Board Behavior on Package-Centric, System-Aware Power Delivery Design"

  Paper:  "CAE Flow in the Development of Digital Equipment"

  Paper:  "A Resonance-Free Power Delivery System Design Methodology Applying 3D Optimized Extended Adaptive Voltage Positioning"

  Article:  "Sigrity Introduces Cost-Savvy Power Decoupling Capacitor Tool for PCB and Package Design"




OptimizePI Awards


OptimizePI recognized by EDN as a Hot Product for 2007


OptimizePI recognized by EDN as a Hot Product for 2007




Feature Presentations


Optimizing Decaps for Performance and Cost

New Approach to Pre-Layout Power Plane Analysis


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  Modified: October 31, 2012

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