|
|
 |
|
|
|
|
|
T2BTM converts transistor to
behavioral models to enable accurate and efficient full bus
simulations in hours instead of days. Model output is in IBIS 3.2,
4.2 and 5.0 formats as well as in an accuracy-enhanced Sigrity
behavioral model format. T2B supports the need for accurate system-level simulation
which has become
essential due to the rapid advance of high-speed interface
technologies. Time-consuming transistor-level simulation and
inaccurate traditional IBIS model simulation fail to measure up in
simulations such as SSO studies where power delivery effects play a
crucial role. Power-aware behavioral driver models generated with
T2B maximize accuracy and support highly efficient simulations using
Sigrity's SPEED2000, SystemSI or HSPICE compatible simulators.
|
|
|
|
|
|
|
|
T2B Flows |
|
|
A T2B generated model can be connected directly to the
chip/package/board system for transient simulation with
Sigrity's SPEED2000. |
|
|
Models converted with T2B can be used in combination with
extracted device and interconnect models for end-to-end
simulations of high-speed parallel bus interfaces with
SystemSI. |
|
|
|
|
|
- and - |
|
|
|
|
|
T2B models can be be used to improve accuracy in flows that
include Synopsys HSPICE. |
|
|
|
|
 |
|
