Sigrity, Inc
    Home  |  Customer Sign-In  |  Contact Us
    Products & Services  |  Support & Training  |  Solutions & Successes  |  About Sigrity
 
 
   

 


Press Release

For Immediate Release

Sigrity Breakthrough Solution Optimizes Performance of Chip/Package
Power Delivery Systems

CoDesign Studio™ is First Solution to Co-Simulate
Complete Package and Chip Together

SANTA CLARA, Calif., May 16, 2005 —Sigrity, Inc., the market leader in power and signal integrity software solutions for integrated circuits, IC packages and printed circuit boards, today announced CoDesign Studio, a complete chip and package co-design solution for analyzing the performance of the combined power delivery system. CoDesign Studio is the first EDA solution to simultaneously co-simulate the complete chip and entire package in an integrated design environment. It leapfrogs existing power integrity tools by including all package effects that impact the correct operation of the chip. Sigrity’s unique co-design methodology ensures that ICs are operational when they are placed into actual packages, preventing costly respins, and potentially saving millions of dollars for companies in the semiconductor, computer, graphics, communications and networking industries.

Unlike other EDA tools, the CoDesign Studio solution analyzes power integrity of the entire chip and package power delivery system. This comprehensive approach combines Sigrity’s proven flagship SPEED2000™ solution for defacto-standard electrical analysis of packages, with the company’s XcitePI™ solution for complete IC power grid analysis.

Jiayuan Fang, president of Sigrity said, “Power integrity issues continue to be a critical concern for high-speed designs. Most current EDA tools inadequately represent chip/package interactions, often leading to incorrect or misleading power analysis results. Sigrity helps companies overcome these deficiencies by co-simulating the complete chip and entire package to ensure correct operation and reduce design iterations.”

Simultaneous chip-package co-simulation

Sigrity’s proprietary computational techniques take into account the complete self and mutual parasitics of the chip and all electromagnetic interactions within the package. CoDesign Studio performs chip and package co-simulation of dynamic power integrity analysis to achieve fast and accurate results. The intelligent “what-if” analysis in the chip-package co-design environment provides engineers with a variety of design choices, including chip and package decoupling capacitor placement, package selection, IC floorplan placement, and IC bump and power grid configuration.

Pricing and Availability

CoDesign Studio is priced from $30K for customers who already have Sigrity’s XcitePI and SPEED2000 products. It will be available in June 2005.

About Sigrity

Sigrity, Inc., a privately held U.S. company incorporated in 1998, delivers advanced software tools that analyze power and signal integrity in chips, packages and boards. Sigrity’s patented methodologies run orders of magnitude faster than general-purpose methods, helping leading companies in the semiconductor, computer, graphics, communications and networking industries ensure high performance and reduce time to market. The company is headquartered in Santa Clara, Calif., with direct sales and global distribution through worldwide representatives. For more information, please access:
http://www.sigrity.com

Sigrity, the Sigrity logo, CoDesign Studio, Speed2000, and XcitePI are trademarks of Sigrity, Inc

 

   1997-2012 Sigrity, Inc.
  Modified: October 31, 2012

  Legal Notices | Privacy Policy
Home  |  Customer Sign-In  |  Contact Us
Products & Services  |  Support & Training  |  Success Stories  |  Company
return to top