Sigrity at DesignCon 2010
We're looking forward to seeing you in early February.
If you're looking for additional Sigrity information, please visit our main web site
at www.sigrity.com or contact us at info@sigrity.com.
We are pleased to have been selected as a finalist for a
DesignVision award again this year. The awards will be
presented on Tuesday, February 2 in the main Theater.
Sigrity DesignCon Booth Activities
We will be featuring recent
advances relating to existing Sigrity products and
unveiling for the first time
Sigrity's new PowerDC-based electrical and thermal
co-simulation capabilities.
Booth Number:
615
Exhibit Hours: Tuesday
February 2 and Wednesday February 3, 12:30 pm - 6:30 pm
Drawings:
Both Tuesday and Wednesday afternoon at 5:00 pm
Multiple
prizes each day
Notable Papers and Panels
Monday , February
1
Special Session: Comparison
of Rapid Solution Techniques for Power Integrity ...
There are a number of techniques where the impedance of
power/ground planes can be analyzed much faster than
traditional EM techniques. The purpose of this special
session is to compare these solution techniques using a set
of pre-defined problem configurations that include simple
and progressively more difficult geometries, including
capacitors with associated inductance and resistance.
The Sigrity participant will focus on hybrid electromagnetic
circuit analysis methods applied to power delivery network
characterization and decoupling.
Time:
1:30 pm - 4:30 pm
Session Number:
TF-MP6
Organizer: Bruce Archambeault,
IBM
Sigrity Speaker: Brad Brim,
Sigrity
Wednesday,
February 3
Paper: Reducing Hotspots in
Backplane Power Distribution ... The paper discusses
ways to identify and reduce local areas of high DC current
density ("hotspots") in a backplane. Mitigation
techniques reviewed include removing copper at strategic
locations and relocating power injection vias for more even
current sharing.
Time:
10:10 am - 10:50 am
Session Number:
10-WA3
Authors: Ron Poon, Consultant; Minh Nguyen,
Ericsson; Radu Talkad, EricssonTechnical Panel: Challenges
of Applying Statistical Analysis Techniques in High Speed
Serial Channel Design ... The panel will discuss some of
the challenges related to determining the Bit Error Rate of
high speed channels.
Time:
3:45 pm - 5:00 pm
Session Number:
TP-W3
Organizer: Dan Oh, Rambus
Sigrity
Participant: Dr. Kumar Keshavan
Thursday, February
4
IBIS Forum ... Arranged as
part of the ongoing IBIS initiative. A Sigrity
presentation will be given covering "An Introduction to
Model Connection Protocols". This presentation is
focused on a proposal that is currently under IBIS
consideration to support a format chip / package / board
model connections for use in the multi-vendor flows.
Time:
8:00 am - 5:00 pm
Room:
203
Sponsors:
IBIS Open Forum and Cisco Systems, Inc.
Contact:
Syed Huq - for free IBIS
Summit Meeting sign-up
Sigrity Presenter:
Brad Brim
More
informationPaper: Power Delivery
Network Optimization for Laptop and Desktop Computer
Platforms ... A method is presented for optimizing power
delivery networks (PDN) for computer platforms.
Frequency domain simulation is applied as a basis for the
optimization and augmented by time domain simulation to
assure voltage noise targets are met at the CPU, memory and
I/O controller. A custom "voltage test tool" controls
PDN current activity and an oscilloscope measures PDN noise
voltage. Analyses and measurements are presented for
both laptop and desktop platforms. Performance is
maintained, or even improved, for cost-sensitive designs
with cost savings of 10% to 45%. Capacitor count
reductions of 20% are achieved for area-constrained designs.
Time:
9:00 am - 9:40 am
Session Number:
10-TH1
Author:
Minglei Wang, Intel; Jinsong Hu, Sigrity
Complete DesignCon
2010 Schedule
(link)
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