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Conference Information and Registration

Solve the PI/SI Problems in Your PCB and Package Designs

高速數位設計所面臨的挑戰越來越多, 從DDR的電源設計到Serial I/O的Jitter分析,從電路板 的直流分析到封裝設計的電性特性檢驗,甚至到整合PCB、 Package和Chip的系統性分析。這些都是目前大家所重視的 問題。在Sigrity 2009 Taiwan User Conference我們 整合上述所有議題,解決大家SI/PI相關的一切問題。其中, 我們更邀請臺灣大學電機系吳宗霖教授,說明如何解決DDR 設計所面臨的Power Integrity問題。

 


High speed digital design challenges are growing. Design teams must cope with DDR interface issues, PCB DC analysis. IC package electrical checks and even systematic analysis across the PCB/PKG/Chip. At the 2009 Sigrity Taiwan User Conference we will cover these topics and help you develop strategies to solve all the SI/PI challenges you may have. We are pleased to have Dr. Tzong-Lin Wu of National Taiwan University's Department of Electrical Engineering with us. Dr Wu will give a talk about power integrity for DDR designs.

Presentations 本次的活動演講的主題如下

  • Power Integrity in High Speed Memory
  • How to Effectively Identify Package Electrical Design Defects that Can Lead to System Failure
  • A Method to Determine the Optimal Remote Sense Locations
  • Predicting Deterministic Jitter on Copper Interconnect
  • P/G noise analysis incorporate with on-chip decaps in system level
  • Power Distribution System Co-design for Cost-effective System Solution
  •  


    活動時間:2009/6/2(星期二) 9:00 - 16:30

    活動地點:新竹科學園區工業東二路1號201會議室
    科技生活館位置圖
    現場備有收費停車場,外縣市可搭高鐵後換接駁公車 直達
    如有問題請電洽02-23712239、0926904150 紀先生


    Tuesday. June 2. 2009. 9:00-16:30
    Rm. 201, 1F., Gongye E. 2nd Rd., Science Industrial Park.
      Hsinchu City 300, Taiwan

                If you have any problem, please contact us

    Email: info@sigrity.com
      Call: +886-926-904-150


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      Modified: October 31, 2012

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