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2007 Articles
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Sigrity's OptimizePI selected as Hot Product 2007
--  EDN, December, 2007
Decap optimization solution receives award as one of a small number of EDA offerings. (link...)
Board level power integrity faces new challenges
--  EETimes Japan, December, 2007
With using high-speed chips board designers are facing the power integrity issue. It is not only in high-end computing but also in consumer and industrial systems. (link...)
Mastering the I/O planning puzzle
--  EETimes, September 24, 2007
The key to system-wide IO planning is achieving balance across all domains of the system so key design criteria can be weighed and evaluated in full system context to guide design decisions. (Read More...)
Integrity drives successful electronic product design
--  EETimes, August 27, 2007
As the pursuit of increased performance and lower cost continue, product design trends for chips, packages and boards pose evermore severe power integrity (PI) and signal integrity (SI) challenges. (Read More...)
Sigrity introduces cost-savvy power-decoupling-capacitor tool for PCB and package design
--  EDN, March 13, 2007
Sigrity Inc. recently introduced a smart decoupling-capacitance tool helps users place just enough capacitance in their designs to reduce costs and still meet performance goals. (Read More...)
Design automation: Tool automates decap decisions
--  EE Times, March 2007
SIGRITY INC. will claim a breakthrough this week when it introduces a tool that helps automate the selection and placement of decoupling capacitors (decaps). (Read More...)
Cost-Optimized PCB Power Integrity Design
--  Printed Circuit Design & Manufacture Magazine, March 2007
New analysis tools measure the performance of the power delivery system and consider both cost and electrical performance resulting in a functional and cost-efficient design. (Read More ...)


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